Essential Duties and Responsibilities: Design, develop, and maintain enterprise‑class SSD firmware features, including performance, reliability, endurance, and data integrity Provide technical leadership and ownership for complex firmware subsystems and features from concept through production and sustainment Drive architecture and design decisions across the firmware stack, with an emphasis on scalable, maintainable, and high‑quality solutions Develop firmware in C/C++ for embedded, real‑time environments across simulation, FPGA, and silicon platforms. Debug complex system‑level issues involving firmware, hardware, ASIC, and host interactions using lab and protocol analysis tools Collaborate closely with cross‑functional teams (ASIC, hardware, validation, system engineering, and program management) to ensure alignment on requirements and execution Participate in design reviews, code reviews, and technical discussions; mentor and guide other firmware engineers Support firmware bring‑up, qualification, customer issues, and post‑production sustainment as needed
Required: BS with 2+ years FW experience, MS with 0+ years The ideal candidate will have experience in: C/C++, Python, Threading, MultiCore GIT/GITHub, Jira, Confluence High Speed Interfaces/Protocols: PCIe, NVMe, etc. Low Speed Interface/Protocols: SMBus, I2C, SPI, UART, etc. Ability to HW Schematics. Debugging using JTAG, Logic Analyzers, Protocol Analyzers, and Oscilloscopes SSD Architecture and Technology Security/TCG-Enterprise/FIPS. Some understanding of Software development workflows and concepts is a plus. Excellent communication skills Ability to provide timely scheduling and resource information to team leads and managers and meet scheduled commitments.
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