As a Pricipal Emulation Engineer in the ASIC Emulation team, you will be responsible for Emulation builds, sanity test suite & methodology. Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development. Create emulation models from RTL / Netlist. Develop hardware collateral to be integrated with the Palladium / FPGA emulation mode. Experience in Palladium or Zebu Platforms Automation and increase process efficiencies. Collaborating cross-functionally to optimize emulation workflows and standardize methodologies. Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design) Triage failures with design, verification, firmware, software teams. Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement. Skills Required: Working knowledge of Linux/Unix environment and shell scripting Excellent debugging and problem-solving skills with simulation and emulation environments. Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues. Strong team player, able to collaborate effectively across architecture, design, and validation teams.
BE or MS degree in Electrical Engineering or Computer Engineering, with 8+ years of experience. Solid experience working on emulation platforms such as Veloce, Zebu, or Palladium (compilation, debug, performance, and throughput tuning) Debugging experience is a must particularly in HW/SW co-debug environments Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe or I2C Experience developing C++, Python, Perl, Shell and TCL test content. Experience debugging failures using waveform viewers, log files and trace dumps.
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