Open Roles
We are seeking highly motivated Master's and Ph.D. candidates with experience in high-speed interface protocols for an internship position in Seoul. This role offers hands-on experience with cutting-edge memory and storage technologies.
Work on high-speed PHY and datapath architectures including clock recovery and signaling schemes. Perform timing budgeting and analysis in custom high-speed designs. Conduct SI/PI analysis with various models including IBIS and SPICE. Collaborate with multi-disciplinary teams across different geographies. Apply theoretical knowledge to practical design challenges while maintaining high levels of integrity and commitment to quality and timeliness.
Strong understanding of high-speed interface protocols including NAND Toggle Mode, ONFI, DDR3/4/5, LPDDR3/4/5, GDDR3/4/5/6, and HBM2/3/3E. Proficiency with EDA tools such as Cadence Virtuoso, Synopsys Custom Compiler, HSPICE, Spectre, and FineSim. Experience with statistical simulation methodologies and mixed-mode simulation is highly valued.
Gain valuable industry experience with a global memory technology leader. Work alongside experienced engineers on real-world projects. Opportunity for mentorship and professional development in a collaborative international environment.